Gray Scale Image Denoising Implementation by Peres Gate

Abstract

Excision of noise from images is a crucial task in image processing this can be attained by divergent approaches. Numerous techniques are available to implement this process. Foremost objective of this project is excision of noise in a reversible manner. Reversible logic is concentrated here as there are many benefits of using this. When we go for a reversible approach the power consumed by gates used is less comparatively. Size of reversible gates is also less so the circuit can be smaller and simple which results in reduction of the transistor count as well as its size. In this approach we have used a particular gate that is PERES gate with 4X4 and 5X5 implementation window with an image size of 1020X1024. The results got and implementation is done using Xilinx platform and a hardware implementation is carried out using a Saturn Spartan 6 Board. We have arrived on different results were we monitor the Gate Count (GC), Garbage Outputs (GO), Ancilla Inputs (AI) and Quantum Cost (QC). The specification mentioned should be as less as possible in order to get accurate results.